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Compared to loop unrolling, the software pipelining allows to limit this code increasing and to maximize the ressource usage rate inside the loop kernel. The quality of the code generated by the T. For this application, the IPC is equal to 1.
The software pipelining technique leads to an IPC around 5. The average IPC in the loop kernels has been stud- ied for the rake receiver symbol estimation and the synchronization part and the results are presented in table 2.
To test different configurations, experi- ments have been achieved with different levels of finger grouping. Let Nf be the parameter corresponding to the number of finger processed together.
In this case, the C code of the Nf fingers are grouped together in- side a same loop. Consequently, when this parameter Nf increases, the length of the C code describing the loop kernel raises. The results, given in table 2, un- derline that the software pipelining optimization tech- nique allows to obtain a relatively high average IPC.
Indeed, the loop kernel average IPC is around 5. The increase of the parameter Nf can lead to a decrease of the IPC inside the loop kernel.
Indeed, the number of registers can be too limited for storing all the intermediate variables. In this case, the data live range must be decreased to free some registers.
More particularly, for each wide-instruction packet, the us- age rate of the different kind of functional unit mul- tiplier, ALU is evaluated. The analysis is presented in figure 3 for one DLL branch of the synchroniza- tion part and in figure 4 for the estimation symbol part. For these bar graphs, each horizontal bar rep- resents a wide instruction packet.
The Y-axis defines the number of this wide instruction packet and the X- axis represents the number of elementary instructions contained in a wide instruction packet. The elemen- tary instructions controlling the multiplier or the ALU units are distinguished.
The results underline that each loop kernel wide in- struction packet is composed of two elementary multi- ply instructions. Thus, the two multipliers are perma- nently used during the kernel execution.
Indeed, the processing achieved in the different parts of a finger is based on complex multiplications and requires to execute a great number of real multiplications. Each complex multiplication requires to execute four real multiplications, one addition and one subtraction.
This in-depth analysis allows to decide if the code can still be optimized. Given that the multipliers are always used, the generated code can not be easily im- proved. In our case, the implementation improvement is not limited by the development tools but by the processor ressources for the computation.
Thus, opportunities for execution time reduction are offered if a computation accuracy diminution is allowed.
Indeed, the diminu- tion of the number of bit used for coding fixed-point data leads to an increase of the quantization noise power.
For illustrating these concepts, the complex correlator used in the rake receiver has been imple- mented on the C64x with different data types.
For each solution, the execution time and the computa- tion accuracy are evaluated. The results are presented in table 3. A methodology for determining automati- cally the data word-length under accuracy constraint has been proposed in . First, the application data dynamic range is evaluated. The dynamic range of a data can be computed from its statistical parameters which are obtained with a floating-point simulation.
This approach allows to estimate accurately the dy- namic range with the help of the signal characteristics but overflow can occur for signal with different sta- tistical properties. Thus, the alternative based on an analytical approach is used. The expression of the different data dynamic range is computed from the dynamic range of the inputs. The second methodology step corresponds to de- termination of the binary point position. The aim is to obtain a correct fixed-point specification of the application which guarantees no overflow.
Moreover, this transformation must allow to respect the different fixed-point arithmetic rules. Thus, scaling operations are included in the application in order to fit the fixed- point format of a data to its dynamic range or to align the binary-point position of the adder inputs. The aim of the third step is to define the type word-length of each data to obtain a complete fixed- point format for each data.
Thus, the data word-lengths are optimized to reduce the ap- plication execution time as long as the accuracy con- straint is fulfilled. This module selects the instructions which will respect the global accuracy constraint and minimize the code execution time. When the fixed-point specification is defined, the C source code is modified to include the different data types. Moreover, intrinsic functions are used to ex- press the data parallelism and to exploit the proces- sor SWP capabilities.
Thus, the parallelization of the data must be achieved by the user. The input data word-length corresponding to the receiving filter output was fixed to 8 bits.
The data word-length for the symbol estimation part of the rake receiver are summarized in table 4. Compared to our method, in the classical ap- proach, the processor SWP capabilities are not used. For comparing the two approaches, the benefit due to the use of the processor SWP capabilities is evalu- ated.
The computed metric corresponds to the ratio between the execution time of the code with SWP op- erations and the execution of the code without SWP operation. Different experiments have been achieved on the symbol estimation and the synchronization sub- systems for several values of the parameter Nf defined in the previous section. The results, presented in table 5, underline the benefit of the SWP operations. Our approach allows to reduce the code execution time of a factor between two and four.
For minimizing the code execution time, the optimization techniques based on the data and in- struction level parallelism exploitation are used. Com- pared to an unoptimized implementation, this ap- proach allows to reduce the code execution time by a factor close to The execution time for computing a sample for the symbol estimation subsystem is equal to 5. The rake receiver uses pilot as well as unknown control and data symbols optimally for improving channel estimation quality.
Moreover, it can take into account the coded structure of all unknown transmitted symbols when channel estimation quality is poor or unsatisfactory. The validity of the proposed method is highlighted by simulation results obtained for the FDD mode of the umts interface. Key words Optimum receiver. Preview Unable to display preview. Download preview PDF.
References  Dempster A. Maximum likelihood from incomplete data via the EM algorithm. Journal of the Royal Statistical Society,39, Google Scholar  Kaleh G.
Joint carrier phase estimation and symbol decoding of trellis codes.